Nvidia invests $2B in Marvell, chipmaker supporting rival network standard

Nvidia's $2 billion（約3200億円） investment in Marvell Technology, announced in March 2026, represents a strategic shift in how the chipmaker thinks about competition in AI infrastructure. Marvell had been developing technology to support UALink, an open interconnect standard designed by a coalition of companies seeking an alternative to Nvidia's proprietary NVLink fabric. The move might seem counterintuitive—investing in a company helping build an alternative to one's own network. The parallel the article offers is vivid: imagine Verizon investing $2 billion（約3200億円） in AT&T, then asking AT&T to make devices compatible with Verizon's network too.

The strategic partnership covering custom AI chips, NVLink Fusion-compatible networking, optical interconnects, and silicon photonics reflects a fundamental change in AI data-center architecture. Hyperscalers—Amazon, Alphabet, Meta, and Microsoft—are no longer content with off-the-shelf GPUs. They are developing custom processors optimized for specific workloads, which can reduce cost, power consumption, or deliver better performance on particular tasks. In a traditional view, this customization would push customers toward alternative suppliers and away from Nvidia's ecosystem. But NVLink Fusion allows Nvidia to keep its interconnect at the center of systems where custom processors coexist alongside Nvidia hardware.

Marvell's particular value lies in its position across multiple architectural paths. The company develops the SerDes technology that sends and receives high-speed electrical signals between chips, designs switches that direct traffic through networks, creates optical DSPs that prepare and recover data traveling through fiber, and helps customers design custom processors around specific workloads. This means Marvell can help a hyperscaler either use UALink for greater openness and supplier flexibility, or connect custom chips to Nvidia's ecosystem via NVLink Fusion. A large customer might even use both for different workloads. Marvell's revenue does not depend on defeating Nvidia or abandoning UALink; it depends on customers needing custom processors and the connectivity to make them work.

The deeper driver is the evolution of the AI data-center bottleneck. Early in the AI boom, the constraint was raw computing power—companies needed more accelerators to train larger models and serve more users. But as systems grow from individual servers to racks containing dozens of accelerators and eventually clusters containing hundreds of thousands of chips, the problem shifts. Processors must constantly exchange data, and a fast accelerator cannot deliver its full performance if it spends too much time waiting for data from another chip. Moving information becomes almost as important as processing it. Copper connections work at current speeds but face trade-offs at higher bandwidth: electrical signals traveling farther require additional silicon to retime, reconstruct, and correct the data, adding power, cost, and complexity. Optical solutions—converting electrical data into light, sending it through fiber, then recovering and correcting the signal—can carry enormous amounts of data over greater distances with less degradation, but they too face engineering constraints as speeds increase. Marvell supplies technology for both copper and optical paths.

Marvell is preparing for the next generation of optical limits through an acquisition in April 2026. The company bought Polariton Technologies, a developer of plasmonics-based modulation technology that Marvell says can advance its optical roadmap toward 3.2T connections and beyond. Modulation—turning electrical data into changes in light that can travel through optical connections—faces harder trade-offs between bandwidth, size, signal quality, and power consumption as data rates rise. Polariton's approach aims to address those constraints, though the article notes that promising photonics technology must still move from demonstrations into reliable, economical, high-volume manufacturing, and adoption may take longer than investors expect.

Nvidia's investment gives the relationship more strategic weight than an ordinary supplier agreement, suggesting Nvidia sees value in Marvell's position across the market. Yet the article cautions that technical importance does not guarantee attractive economics. Custom-chip design wins can take years to enter production; large customers can divide projects among multiple suppliers or bring more work in-house. Marvell also competes against Broadcom, which has deep custom-silicon relationships and a broad networking portfolio, and against Nvidia itself, which continues developing more surrounding infrastructure. The question for investors is whether Marvell can convert its engineering position into durable revenue, margins, and cash flow—and whether its value will ultimately come not from choosing a side, but from being a company both sides need to build the next generation of AI infrastructure.

The investment appears paradoxical on the surface—why would Nvidia fund a company helping build alternatives to its own interconnect fabric? The answer lies in how the AI infrastructure market is evolving. Hyperscalers including Amazon, Alphabet, Meta, and Microsoft are developing custom silicon tailored to specific workloads, reducing their dependence on Nvidia GPUs as general-purpose accelerators. Nvidia could treat this customization as a competitive threat. Instead, NVLink Fusion allows Nvidia to participate in hybrid systems where custom processors coexist with its networking infrastructure, even if Nvidia does not manufacture every chip in the stack.

Marvell's strategic position is unusual because it operates across both paths. It helps customers design custom silicon and develop the connectivity technologies—electrical interfaces, switches, optical signal processors, and silicon photonics—needed to make those systems work. This means a customer can choose a non-Nvidia processor without necessarily abandoning Nvidia's interconnect, or choose an open standard like UALink for greater supplier flexibility. Marvell's business succeeds as long as customers need custom processors and the connectivity required to connect them, regardless of which fabric they select.

The technical driver underpinning this shift is the changing bottleneck in AI data centers. The first stage of the AI boom centered on computing power—adding more accelerators to train larger models. But as systems scale from individual servers to racks containing dozens of accelerators and clusters containing hundreds of thousands of chips, the problem shifts. Moving data between processors becomes almost as important as processing it. Nvidia's Rubin generation will deliver more computing power, which means more traffic moving among processors, memory, switches, and storage. Each increase in computing density puts greater pressure on the surrounding network. Marvell's portfolio of SerDes technology, switches, optical DSPs, and custom-silicon services is positioned to solve different parts of this interconnection problem.