What is a dual-ISA core?

It is a processor core that can natively execute two different instruction set architectures. In this case, each IBM Z core runs both z/Architecture and Arm AArch64 without translation.

Will existing mainframe software still work?

Yes. The design lets Z customers keep mainframe code while also running Arm software, with threads switching between s390x and Arm in nanoseconds.

What is the AI accelerator's memory bandwidth?

It has 96GB of HBM3e delivering roughly 4TB/s, about 20x the memory bandwidth of the current generation.

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IBM dual-ISA mainframe chip runs Arm natively

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Key takeaway

IBM unveiled a mainframe processor with Arm support built in. Each core runs both z/Architecture and Arm natively.
It also added an AI accelerator for larger workloads.
The goal is to keep mainframes relevant as Arm software grows.

3 Key Points

What happened
IBM detailed its future IBM Z and LinuxONE processors at Hot Chips 2026. Each core natively runs both z/Architecture and Arm AArch64, with 11 cores at 5.7+ GHz on a 2nm process and 2,792 implemented AArch64 instructions.
Why it matters
This merges mainframe reliability with the Arm software ecosystem, letting customers run unmodified Arm software on a mainframe. It also adds a second-generation AI inference accelerator with 96GB of HBM3e, targeting larger enterprise workloads.
What to watch
How much of the surrounding Arm software stack runs unmodified on the core. IBM claims Arm SystemReady compliance, which could determine how much off-the-shelf software the platform can absorb.

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Context & Analysis

IBM's presentation at Hot Chips 2026 marks a strategic shift in mainframe design. By implementing AArch64 in full hardware rather than through translation, IBM effectively turns each Z core into a native Arm processor, capable of running unmodified Arm software. This is a bid to open the mainframe platform to the vast Arm software ecosystem, which has become dominant in cloud and mobile environments. The dual-ISA approach also preserves the traditional mainframe workload, allowing both s390x and Arm code to run concurrently on the same processor, managed through Linux KVM or OpenShift Virtualization.

The second-generation AI inference accelerator complements this by addressing the demand for on-premises AI processing. With FP4 and MXFP4 datatypes and up to 4x TOPS, it targets larger enterprise workloads, adding 96GB of HBM3e and a 20x memory bandwidth increase over the current generation. This positions the Z platform for mission-critical AI, with confidential computing and quantum-safe cryptography. The challenge ahead is how much of the surrounding Arm software stack will run unmodified, which will determine the platform's appeal beyond existing mainframe customers.

FAQ

What is a dual-ISA core?: It is a processor core that can natively execute two different instruction set architectures. In this case, each IBM Z core runs both z/Architecture and Arm AArch64 without translation.
Will existing mainframe software still work?: Yes. The design lets Z customers keep mainframe code while also running Arm software, with threads switching between s390x and Arm in nanoseconds.
What is the AI accelerator's memory bandwidth?: It has 96GB of HBM3e delivering roughly 4TB/s, about 20x the memory bandwidth of the current generation.